1. Field of the Invention
Generally, the subject matter disclosed herein relates to integrated circuits, and, more particularly, to short-channel NMOS transistor devices. More particularly, the subject matter disclosed herein relates to improved N-channel MOSFETs with reduced diffusion of halo species.
2. Description of the Related Art
Integrated circuits formed on semiconductor wafers typically include a large number of circuit elements, which form an electric circuit. In addition to active devices such as, for example, field effect transistors and/or bipolar transistors, integrated circuits can include passive devices such as resistors, inductors and/or capacitors. In particular, during the fabrication of complex integrated circuits using CMOS technology, millions of transistors, i.e., N-channel transistors and P-channel transistors, are formed on a substrate including a crystalline semiconductor layer.
A MOS transistor, for example, irrespective of whether an N-channel transistor or a P-channel transistor is considered, comprises so-called PN junctions that are formed by an interface of highly doped drain and source regions with an inversely or weakly doped channel region disposed between the drain region and the source region. The conductivity of the channel region, i.e., the drive current capability of the conductive channel, is controlled by a gate electrode formed near the channel region and separated therefrom by a thin insulating layer.
The conductivity of the channel region, upon formation of a conductive channel due to the application of an appropriate control voltage to the gate electrode, depends on, among other things, the dopant concentration, the mobility of the majority charge carriers and, for a given extension of the channel region in the transistor width direction, the distance between the source and drain regions, which is also referred to as channel length.
Hence, in combination with the capability of rapidly creating a conductive channel below the insulating layer upon application of the control voltage to the gate electrode, the overall conductivity of the channel region substantially determines the performance of the MOS transistors.
Nowadays, the ongoing demand for miniaturization of semiconductor devices of ICs results in the fabrication of MOS transistors with channel lengths of below some 70 or 60 nm. For such dimensions, the reverse short-channel effect poses severe problems for reliable operation of the short-channel MOSFETs. The reverse short-channel effect can be described as an increase of the threshold voltage with decrease of the channel length.
One reason for the reverse short-channel effect can be seen in the diffusion of channel implants induced, for example, by source/drain extension implants or deep source/drain implants or halo implants. Oxidation enhanced diffusion caused by the injection of self-interstitials causes severe problems in this context. This kind of silicon point defects particularly promote the diffusion of halo species, as boron, used as a halo implant in the manufacturing of N-channel MOSFETs. In fact, it turned out that the diffusivity of boron is mainly determined by the concentration of silicon self-interstitials caused during oxidation procedures.
In the art it is known to provide carbon implants in order to suppress the diffusion of halo species, for example, boron diffusion. However, present carbon implantation in channels of TFTs does not reliably suppress the enhanced diffusion of halo species, particularly boron, and, thus, the above-mentioned reverse short-channel effect.
Therefore, it is an object of the present invention to mitigate the problem of halo species diffusion, in particular boron diffusion, in N-channel TFTs.